The present invention relates generally to the fabrication of semiconductor devices, and more particularly to a process for selectively removing a silicon-containing material through use of an alkyl halide byproduct generated during formation of a conductive material diffusion barrier layer.
As the demand for cheaper, faster, low-power consuming microprocessors increases, so must the device packing density of integrated circuits (ICs) used in microprocessors. Very Large Scale Integration (VLSI) and deep submicron Ultra Large Scale Integration (ULSI) techniques have continually evolved to meet the increased demand. Modem ICs are manufactured by an elaborate process in which a large number of electronic semiconductor devices are integrally formed on a semiconductor substrate. Conventional semiconductor devices which are formed on a semiconductor substrate include capacitors, resistors, transistors, diodes, etc.
In advanced manufacturing of ICs, hundreds of thousands of semiconductor devices are formed on a single semiconductor substrate. In order to compactly form the semiconductor devices, the semiconductor devices are formed on varying levels of the semiconductor substrate. This requires forming the semiconductor substrate with a topographical design.
Generally, the fabrication of a semiconductor device includes three steps. First, a silicon wafer is prepared and acts as a foundation for the semiconductor device. Second, the specific semiconductor device is fabricated on top of or within the silicon wafer. Third, the electrical contacts which electrically connect the semiconductor device to external circuitry are fabricated. Each of these three steps further includes various process and fabrication steps.
With respect to the step of preparing a silicon wafer for a semiconductor fabrication, several layers are fabricated on top of the silicon wafer in preparation for the fabrication of the semiconductor device. In one example, an oxide layer, as is known in the art, is fabricated on top of a silicon-based layer. An organic material layer, such as a photoresist layer, is fabricated over the oxide layer. The photoresist layer is then selectively removed to expose one or more portions of the oxide layer. The substrate is then subject to a chemical etch process utilizing a chemical etch solution which selectively removes a portion of the oxide layer in the exposed areas. The remainder of the photoresist layer is then conventionally removed, such as by an xe2x80x9cashingxe2x80x9d process in a plasma environment. The process includes the heating of the wafer and use of oxygen gas. Another conventional technique is a wet chemical removal process including dissolving the photoresist layer in a chemical solution containing sulfuric acid and hydrogen peroxide. Alternatively, both processes may be used sequentially (oxygen ash followed by a wet chemical removal). The specific semiconductor device(s) may then be fabricated. A reactive ion etch process is used to define patterns in the oxide layer. Various gaseous mixtures may be used in this process, including, for example, boron trichloride, hydrogen bromide, and chlorine.
With respect to the step of fabricating electrical contacts, aluminum alloys were previously the most commonly used conductive materials. Aluminum has attractive features for use as an electrical connection such as relatively low electrical resistivity and strong adhesion to silicon-containing materials. However, as VLSI dimensions reach into the deep submicron ULSI regime, the deficiency of aluminum and its alloys become limiting factors in achieving superior performance. For example, as the width of electrical interconnections become narrower, the resistance of aluminum becomes non-negligible and begins to contribute significantly to the resistance-capacitance time delay of the device. Additionally, with decreasing dimensions, the design criteria becomes increasingly restricted by reliability concerns associated with aluminum connections such as electromigration, stress-induced formation, and current density limitations.
For these reasons, the industry has recently migrated towards the investigation of more robust, more conductive metals for use in electrical connection technology. Copper is quickly becoming the conductive metal of choice. Copper is approximately 40% lower in resistivity than aluminum and has fewer reliability concerns. In addition, copper provides the desirably conductivity necessary for a proper electrical connection.
A damascene process has been developed to fabricate an electrical connection for use with a VLSI or ULSI circuit. The damascene process includes a chemical vapor deposition (CVD) method for depositing a copper thin film in a developed trench within the oxide film (dielectric layer). However, prior art devices suffer from a deficiency in the deposition of the copper film by means of the CVD method. Specifically, copper atoms are readily diffusable into the adjacent oxide film (dielectric layer) at temperatures required for the formation of the interconnections. The electronic properties of a fabricated semiconductor device are adversely affected by the diffusion of copper into an active region of the semiconductor device. Therefore, in order to prevent the copper atoms from diffusing into an active region of a semiconductor device, a copper diffusion-preventing thin film (a barrier layer) encapsulating the copper wire is required.
Initially, titanium nitride was employed as the barrier layer. However, copper does not properly adhere to titanium nitride. Therefore, the copper film is liable to be stripped away during polishing or thermal treating subsequent to the deposition of the copper film into the titanium nitride barrier layer.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need for a reliable barrier layer which will prevent the diffusion of copper into adjacent oxide or polysilicon layers. A need also exists for the utilization of a byproduct generated during the formation of the barrier layer. Utilizing the byproduct in another process step of the overall fabrication of an IC would greatly increase efficiency and reduce costs of the overall fabrication process.
The above-mentioned problems with conventional techniques for fabricating a semiconductor device and other problems are addressed by the present invention and will be understood by reading and studying the following specification. A process for selectively removing a silicon-containing material through use of an alkyl halide byproduct formed during fabrication of a barrier layer is disclosed. The barrier layer prohibits diffusion of an electrically connecting material into an adjacent insulating (dielectric) layer.
In particular, an illustrative embodiment of the present invention includes fabricating electrical contacts for interconnecting a first semiconductor device to external circuitry. The fabrication process further includes forming an insulating layer upon a silicon base layer such that the insulating film has a cavity. A diffusion barrier layer is deposited into the cavity. The diffusion barrier layer is formed during a chemical vapor deposition which produces an alkyl halide as a byproduct. An electrically conducting material is deposited into the remaining portion of the cavity. The diffusion barrier layer prevents diffusion of the electrically conducting material into the adjacent insulating layer. The present invention also includes preparing a silicon wafer prior to the formation of a second semiconductor device. The preparation process further includes forming a photoresist layer upon a silicon-containing layer. A portion of the photoresist layer is removed, thereby exposing a portion of the silicon-containing layer. The exposed portion of the silicon-containing layer is removed with a chemical etch solution including the alkyl halide produced during the chemical vapor deposition of the diffusion barrier layer.
In another preferred embodiment, a process of generating an alkyl halide during a fabrication of a first semiconductor device and utilizing the alkyl halide to selectively remove silicon-containing material during the fabrication of a second semiconductor device is disclosed. The process includes fabricating a first semiconductor device which further includes fabricating an insulating layer upon a silicon base layer such that the insulating layer includes a cavity. A diffusion barrier layer is deposited into the cavity. The diffusion barrier layer includes tantalum nitride which is formed during a chemical vapor deposition. The chemical vapor deposition also produces an alkyl halide as a byproduct. An electrically conducting material is deposited into the remaining portion of the cavity. A second semiconductor device is fabricated which further includes fabricating a photoresist layer upon a silicon-containing layer. A portion of the photoresist layer is removed, thereby exposing a portion of the silicon-containing layer. The exposed portion of the polysilicon layer is removed with a chemical etch solution which includes the alkyl halide of the diffusion barrier layer. The present invention provides a novel technique of using previously unused byproducts formed during the fabrication of electrical contacts which connect a semiconductor device to external circuit as a feeder or etching material used in the preparation of a semiconductor wafer prior to formation of a semiconductor device. More specifically, a byproduct formed during the fabrication of a conductive material diffusion barrier layer is stored and used in a subsequent fabrication process. The byproduct is used as a chemical etch solution to remove portions of a silicon-containing material. Therefore, rather than disposing of the byproduct, which can be a costly procedure, a byproduct is stored and utilized in a subsequent fabrication process, thereby reducing cost and increasing efficiency.